Higher-Order Masking Schemes for NTT Multipliers and Rejection Sampling

Core engineering and protocols for Silicon Polynomial Masking.

The Challenge of Masking Lattice Cryptography in Silicon

While masking classical symmetric ciphers (like AES) is well understood, masking lattice-based algorithms like ML-KEM and ML-DSA presents unique mathematical hurdles: calculations switch back and forth between arithmetic operations over ring Z_q and Boolean operations in Keccak hash functions and byte unpacking.

Efficient Boolean-to-Arithmetic (B2A) Conversion

EmbeddedShield incorporates proprietary hardware-accelerated Boolean-to-Arithmetic (B2A) and Arithmetic-to-Boolean (A2B) conversion circuits. By minimizing the cycle count and die area required for mask translation, our IP core enables complete second-order masking with less than 2.2x latency overhead compared to unmasked silicon.

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